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For my study-year-work I had to solve the task of designing a integrated high speed comparator. It was needed for a chip, which has to controll the parallel operation of IGBTs in power devices.

The first time I had to deal  with integrated circuit design and had to work on self it. Great support I did got from Sascha Pawel.  He showed me all the tools , helped and explained as far as possible. I couldn’t imagine a better guidance. When ever possible he had time for me, even if “just” for a motivating talk. I wane say THANK YOU to him again on this place!

Because I had to design a high speed comparator, I did look for comertial ones, for finding out, how quick “high speed” is. One of the quickest, available, high speed comparator has been the MAX961 from Maxim. It did promise a propagation delay of 4,8ns. To convince myself of this, I designed a small PCB, for testing the chip. It did hold the promise

Analyzing the literature I found, that the strobed flip flop would bee a promising circuit topology.  For such a circuit (see left hand side) the Inputs of a flip flop are controlled by a differential amplifier. The flip flop is clocked. Depending of the inputs, its output will get the one or other value.

Corresponding to this, I did design the shown circuit for a 2mm technology. Except the here shown comparator part other circuit block has been needed, like the signal catching circuit, a digital controll logic, RC- oscillator, … ect. For designing the circuit I did choose a clock of 33MHz, which will cause a propagation delay of 30ns. Trusting into the simulation results it would had been possible to use a higher frequency, but this would mean to risk, that the whole circuit wouldn’t work.

Anyway – I did learn a lot of integrated circuit design and I could use this knowledge 1 to 1 for my master degree.

 Because it look interesting, I want to show, what integrated devices are look like. For doing the layout you principally have to draw a whole lot of rectangles and polygons. You have to know the different layers (vias, polysilicon, wires, …) and the minimum distances. At the end the software is checking, weather all distances are ok and no short cuts have be done.

The layout of integrated devices are looking like this:

           polysilicon resistor                                        NMOS transistor                      MOS capacitor

Layout of the comparator circuit above.

After the layout is finished, a program is reading the circuit back from it. This program is trying to find the electrical devices from the geometries of the layout. The result is a so called netlist, which equals to the circuit of the layout. This netlist consists of more devices than the original one, because it contains several parasitic elements, like the capacitance of the wires. These parasitics can have a big influence of the funtionatity of the circuit. Therefore it is important to simulate the circuit again, proving it is working. Sometimes the circuit or layout has to be changed afterwards.  

 Unfortunately the chip has been manufactured after the end of the work. The measurement result proofed the expectations. The study year work has been graded with mark 1.3.

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